The current invention relates to maintaining the integrity of data on a bus during the installation and removal of a circuit board in a system and the extension and retraction of the bus during live bus activity.
Hot swapping is the insertion or removal of a circuit board in a system without powering down the whole system. Generally, it requires that all bus activity be stopped before allowing the hot swap to take place. Therefore, the user must force all applications using the bus to cease transactions, swap the board, and then restart the transactions. Some devices can be hot-swapped without quieting the bus, but, most of these devices are relatively simple, accessing the bus only in one place and appearing as short xe2x80x9cstubsxe2x80x9d on the bus. For boards having multiple devices on them, the bus must be extended onto or retracted from the board during the hot swap. For such boards, hot swapping while the bus is active will likely cause data corruption with potentially catastrophic consequences.
Some hot swap schemes employ mechanical, electrical, and electro-mechanical means to allow circuit board insertion and extraction. Likewise, many hot swap schemes use staggered pin lengths to control power connection and disconnection and circuitry to connect and disconnect output drives from control and signal buses. None of these hot swap schemes takes into account the extension or retraction of the bus onto or from the circuit board during the hot swap, nor do they allow bus activity during hot-swapping or prevent data corruption due to the instability of the bus during this extension or retraction.
The invention is a method and apparatus that allows for bus extension or retraction when hot-swapping a circuit board into an enclosure with the power on and an active bus. More definitively, it allows the active bus to be extended onto the circuit board being installed without data corruption. With the bus extended onto the circuit board, multiple devices on the circuit board can access the bus. Moreover, in a dual controller enclosure, with two redundant controller boards, data being passed on the 1st channel corresponding to one of the controller boards does not have to be stopped while the other controller board is being replaced due to failure. Therefore, the invention allows for the bus to be extended or retracted without a user having to go through the extra steps of stopping all device activity before swapping hardware.
When the bus is extended from a mid-plane in an enclosure, the mid-plane bus terminator is turned off, the bus extends onto the circuit board, and bus terminators on the end of the board are turned on. If the bus is active, however, this can cause data corruption. Accordingly, the invention enforces a bus reset upon detecting the extension of the bus which stops device activity until the bus terminators on the end of the board are fully active and the associated mid-plane terminators are inactive. Once the bus terminators on the end of the board are fully active, the bus is stable, and the bus reset is de-asserted. This allows device activity to resume on the bus. When the bus is retracted from the board onto the midplane, a similar process takes place, with the terminators being turned off and turned on in the opposite order. A bus reset is similarly asserted and de-asserted once the midplane bus terminator is fully active.
The preferred apparatus comprises a bus extension/retraction detection component and a bus reset assertion component. These components perform the bus extension/retraction detection and bus reset assertion and de-assertion steps of the preferred method. In an embodiment, these components are located on the controller boards in a dual controller enclosure so that the controller boards monitor each other for hot-swapping.
In a preferred embodiment, the bus extension/retraction detection component detects the bus extension or retraction by receiving as inputs the states of the longest set of pins and the shortest set of pins from the board being hot swapped. The only time the inputs of both the longest set and shortest set of pins are high is when the board is either being inserted or extracted from the system, i.e., during the extension/retraction of the bus.
In a preferred embodiment, the bus reset assertion component outputs the reset signal through a series of Schmitt trigger inverters with a RC combination that acts to extend the pulse at the output of the second inverter. The RC combination is configured to extend the pulse for sufficient time to allow the second bus terminator to fully activate, and thus, for the bus to stabilize.
The bus reset assertion component is interfaced with the bus to produce the appropriate type of output signal required by the bus devices. For example, in a preferred embodiment the interface produces an open-collector output. In another embodiment, the output is a differential output.